AArch64 Assembler

These words are for writing new code words. (At some point, these will probably be put into their own wordlist, and something like the typical ;CODE and END-CODE will be added.)



The constants X0, X1, ..., X29, X30, XZR, XSP exist, and are used to specify registers to instructions.

Other Constants

The shifts LSL, LSR, ASR, ROR are provided for instructions that take shifted registers as arguments.


All of these words consume all of their arguments and leave nothing on the stack.

INSN/ADD-IMM64!insn-addr dst-reg src-reg immadd dst-reg, src-reg, #imm
INSN/ADR!insn-addr reg valueadr reg, value
INSN/B!insn-addr dest-addrb dest-addr
INSN/BL!insn-addr dest-addrbl dest-addr
INSN/HVC!insn-addr immhvc #imm
INSN/LDP-POST64!insn-addr dst1-reg dst2-reg addr-reg immldp dst1-reg, dst2-reg, [addr-reg], #imm
INSN/LDR-IMM-POST64!insn-addr dst-reg addr-reg immldr dst-reg, [addr-reg], #imm
INSN/LDR-LIT64!insn-addr dst-reg mem-addrldr dst-reg, [mem-addr]
INSN/MOV-REG64!insn-addr dst-reg src-regmov dst-reg, src-reg
INSN/ORR-SREG64!insn-addr dst-reg src1-reg src2-reg shift-kind shift-amountorr dst-reg, src1-reg, src2-reg, shift-kind shift-amount
INSN/STP-PRE64!insn-addr src1-reg src2-reg addr-reg immstp src1-reg, src2-reg, [addr-reg, #imm]!
INSN/STR-IMM-PRE64!insn-addr src-reg addr-reg immstr src-reg, [addr-reg, #imm]!
INSN/SMC!insn-addr immsmc #imm
INSN/SVC!insn-addr immsvc #imm