AArch64 Assembler
These words are for writing new code words. (At some point, these will probably be put into their own wordlist, and something like the typical ;CODE and END-CODE will be added.)
Constants
Registers
The constants X0, X1, ..., X29, X30, XZR, XSP exist, and are used to specify registers to instructions.
Other Constants
The shifts LSL, LSR, ASR, ROR are provided for instructions that take shifted registers as arguments.
Instructions
All of these words consume all of their arguments and leave nothing on the stack.
| Word | Arguments | Instruction |
|---|---|---|
INSN/ADD-IMM64! | insn-addr dst-reg src-reg imm | add dst-reg, src-reg, #imm |
INSN/ADR! | insn-addr reg value | adr reg, value |
INSN/B! | insn-addr dest-addr | b dest-addr |
INSN/BL! | insn-addr dest-addr | bl dest-addr |
INSN/ERET! | insn-addr | eret |
INSN/HVC! | insn-addr imm | hvc #imm |
INSN/LDP-POST64! | insn-addr dst1-reg dst2-reg addr-reg imm | ldp dst1-reg, dst2-reg, [addr-reg], #imm |
INSN/LDR-IMM-POST64! | insn-addr dst-reg addr-reg imm | ldr dst-reg, [addr-reg], #imm |
INSN/LDR-LIT64! | insn-addr dst-reg mem-addr | ldr dst-reg, [mem-addr] |
INSN/MOV-REG64! | insn-addr dst-reg src-reg | mov dst-reg, src-reg |
INSN/NOP! | insn-addr | nop |
INSN/ORR-SREG64! | insn-addr dst-reg src1-reg src2-reg shift-kind shift-amount | orr dst-reg, src1-reg, src2-reg, shift-kind shift-amount |
INSN/RET! | insn-addr | ret |
INSN/STP-PRE64! | insn-addr src1-reg src2-reg addr-reg imm | stp src1-reg, src2-reg, [addr-reg, #imm]! |
INSN/STR-IMM-PRE64! | insn-addr src-reg addr-reg imm | str src-reg, [addr-reg, #imm]! |
INSN/SMC! | insn-addr imm | smc #imm |
INSN/SVC! | insn-addr imm | svc #imm |